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Google adds TPU 8tx and TPU 8i Max, its third and fourth TPUs this year
Google has expanded its eighth-generation TPU line-up with TPU 8tx for confidential inference and TPU 8i Max, a dual-chip package with double the compute, SRAM and HBM bandwidth of TPU 8i for agents working across huge context windows. It is the first time Google has launched four TPU systems in one year.

Google has added two more systems to its eighth-generation TPU family: TPU 8tx for secure and confidential inference, and TPU 8i Max for agents that need to reason across very large context windows[1]. Together with TPU 8t and TPU 8i from April, it is the first time Google has introduced four TPU systems in a single year.
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TPU 8tx: confidential computing for agents
Data is usually encrypted at rest and in transit but has to be unlocked in memory while a computer works on it. TPU 8tx builds protection into the hardware so sensitive data and model weights stay isolated even while in use[1]. It is built on the same silicon as TPU 8t, paired with 5th Generation AMD EPYC CPU hosts, and uses the low-latency Boardfly network Google designed for real-time reasoning. Google says that gives up to 2x lower latency than TPU 8t with a near-zero performance penalty.
Google is pitching it at regulated enterprises and governments that want to fine-tune on private data, distil large models into smaller ones and train agents with reinforcement learning without moving sensitive data between clusters.
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TPU 8i Max: aimed at the memory wall
TPU 8i Max puts two TPU 8i chips on a single package, doubling compute, SRAM and HBM bandwidth compared with TPU 8i[1]. Google's argument is that when dozens of agents work across an entire codebase or hours of video, memory bandwidth, not raw compute, becomes the bottleneck. Because it fits twice the silicon in the existing rack footprint, it also packs more compute per square foot and per watt.
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Systems, not new silicon
Google is careful to call these new systems rather than new chips. Its TPUs were designed as modular building blocks, so packaging, high-speed memory, optical networking and security can be changed around the chip far faster than a new chip can be designed and manufactured[1].
The company says TPUs now have nearly 100 customers, including frontier labs, trading firms, retailers and universities, and that some customers now deploy TPUs directly in their own data centres.
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The software push
Much of the announcement is about making TPUs easier to adopt for developers who live in PyTorch[1]:
- TorchTPU, open-sourced last month, runs PyTorch code and Hugging Face models natively, alongside TPU backends for vLLM and SGLang.
- A TPU agent suite in preview plugs into Claude Code, Cursor and Google Antigravity to automate onboarding, find bottlenecks and tune kernels.
- TPU Sync, now open source, treats chip HBM, host memory, storage and the network as one memory hierarchy, which Google says cuts KV cache transfer latency and time to first token by more than 90%.
- Agent Compute Engine suspends and resumes idle agent sessions while they wait on tools or people.
- Cloud Pathways and GKE dynamic slicing are now generally available, with Google claiming up to 5x faster job start-up from dynamic slicing.
Google did not publish pricing or availability dates for either new system.
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Why it matters
Nvidia's biggest advantage has long been software, not just silicon. By shipping specialised hardware variants every few months and removing the need to rewrite PyTorch code, Google is trying to make TPUs a default option for agent workloads rather than a specialist choice. Confidential computing on TPU 8tx also opens doors in government and regulated industries that have been wary of running frontier models next to sensitive data.
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FAQ
Frequently asked questions.
01What did Google announce?
Two new eighth-generation TPU systems: TPU 8tx for secure and confidential inference, and TPU 8i Max for very large context windows and the highest compute density per rack. They join TPU 8t and TPU 8i, which launched at Google Cloud Next in April.
02What is TPU 8tx for?
Regulated enterprises and governments that need to run models and agents on sensitive data. It uses the same silicon as TPU 8t, pairs it with 5th Generation AMD EPYC hosts, and keeps data and model weights protected even while they are being processed. Google says it delivers up to 2x lower latency than TPU 8t.
03What is TPU 8i Max?
Two TPU 8i chips combined on one package, giving double the compute, double the SRAM and double the HBM bandwidth of TPU 8i. Because it fits twice the silicon into the same rack footprint, Google says data centres get more compute per square foot and per watt.
04Are these new chips?
Not new silicon. Google describes them as new systems, meaning new ways of packaging, networking and securing existing eighth-generation chips, which is how it can ship them in months rather than years.
05What changed on the software side?
Google highlighted its open-source TorchTPU for running PyTorch and Hugging Face models natively, a preview TPU agent suite that plugs into coding tools such as Claude Code and Cursor, a new open-source XLA Serving Engine, an open-source model-state layer called TPU Sync, and general availability of Cloud Pathways and GKE dynamic slicing.
06Did Google give pricing or availability dates?
The announcement did not include pricing or specific availability dates for either system.
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